FPGA - AT6000 FPGAs - Application Note

Convolution is one of the basic and most common operations in both analog and digital domain signal processing. Often times, it is desirable to modulate a given signal in order to enhance or extract important information contained in it. This signal modulation is generally known as filtering. In two-dimensional digital signal processing (2-D DSP), a 3x3 convolver is commonly used in applications such as object detection and feature extraction of 2-D images. However, due to the compute-intensive nature (multiply-add operations) of 2-D convolution, the size of the required d ig i ta l l og i c c i r cu i t r y i nc reases accordingly. In this application note, we present an efficient single-chip FPGA implementation of a bit-parallel 3x3 symmetric convolver that features runtime software-configurable convolver coefficients (taps). Our reference design takes full advantage of time-division mul t i p lex ing (TDM) , p ipe l i n ing , CacheLogic, and vector multiplication. We will also discuss an alternative to using CacheLogic, which features runtime hardware self-configurable LUT using static random access memory (SRAM).